This invention relates to direct memory access (DMA) used in a peripheral device of a central processing unit (CPU) in transferring data between a memory device and an input/output device in compliance with a plurality of pointers. More particularly this invention relates to a direct memory access method and to a direct memory access system for carrying out the direct memory access of the type described. The direct memory access system is often called a descriptor table system in the art. Its direct memory access controller is preferably implemented as a semiconductor device of large scale integration (LSI).
In the manner which will later be described in greater detail a conventional direct memory access system comprises a direct memory access controller connected to a system bus together with a central processing unit and a memory device and to an input/output or similar external device. Transfer of the data between the memory device and the input/output device is controlled in compliance with a plurality of pointers. On transferring the data, the direct memory access controller refers to the pointers. The data are directly transferred without use of the central processing unit. The direct memory access is therefore operable at a high speed in contrast to program control and is advantageous in dealing with a great amount of data as blocks.
The conventional direct memory access system is, however, incapable of interrupting or suspending the transfer at one of the pointers. It has therefore been unavoidable on interrupting the transfer to rearrange the pointers by omitting the above-mentioned one of the pointers. This is troublesome and reduces the speed of transfer of the data.